// Cell names have been changed in this file by netl_namemap on Mon Jan  3 04:00:12 UTC 2022
////////////////////////////////////////////////////////////////////////////// 
//
//  cr_rw_mem.v
//
//  Control Register Memory for read-write values
//
//  Original Author: Ameer Youssef
//  Current Owner:   Ameer Youssef
//
////////////////////////////////////////////////////////////////////////////// 
//
// Copyright (C) 2013 Synopsys, Inc.  All rights reserved.
//
// SYNOPSYS CONFIDENTIAL - This is an unpublished, proprietary work of
// Synopsys, Inc., and is fully protected under copyright and trade secret
// laws.  You may not view, use, disclose, copy, or distribute this file or
// any information contained herein except pursuant to a valid written
// license agreement. It may not be used, reproduced, or disclosed to others
// except in accordance with the terms and conditions of that agreement.
//
////////////////////////////////////////////////////////////////////////////// 
//
//    Perforce Information
//    $Author: ameer $
//    $File: //dwh/up16/main/dev/pcs_raw/dig/rtl/cr_rw_mem.v $
//    $DateTime: 2014/09/21 23:31:25 $
//    $Revision: #3 $
//
////////////////////////////////////////////////////////////////////////////// 

`include "dwc_e12mp_phy_x4_ns_cr_macros.v"

`timescale 1ns/10fs
module dwc_e12mp_phy_x4_ns_cr_rw_mem
  #(parameter ROM = 1,
    parameter WIDTH = 1,
    parameter [WIDTH-1:0]  CR_0_RST = 0,
    parameter [WIDTH-1:0]  CR_1_RST = 0,
    parameter [WIDTH-1:0]  CR_2_RST = 0,
    parameter [WIDTH-1:0]  CR_3_RST = 0,
    parameter [WIDTH-1:0]  CR_4_RST = 0,
    parameter [WIDTH-1:0]  CR_5_RST = 0,
    parameter [WIDTH-1:0]  CR_6_RST = 0,
    parameter [WIDTH-1:0]  CR_7_RST = 0,
    parameter [WIDTH-1:0]  CR_8_RST = 0,
    parameter [WIDTH-1:0]  CR_9_RST = 0,
    parameter [WIDTH-1:0] CR_10_RST = 0,
    parameter [WIDTH-1:0] CR_11_RST = 0,
    parameter [WIDTH-1:0] CR_12_RST = 0,
    parameter [WIDTH-1:0] CR_13_RST = 0,
    parameter [WIDTH-1:0] CR_14_RST = 0,
    parameter [WIDTH-1:0] CR_15_RST = 0,
    parameter [WIDTH-1:0] CR_16_RST = 0,
    parameter [WIDTH-1:0] CR_17_RST = 0,
    parameter [WIDTH-1:0] CR_18_RST = 0,
    parameter [WIDTH-1:0] CR_19_RST = 0,
    parameter [WIDTH-1:0] CR_20_RST = 0,
    parameter [WIDTH-1:0] CR_21_RST = 0,
    parameter [WIDTH-1:0] CR_22_RST = 0,
    parameter [WIDTH-1:0] CR_23_RST = 0,
    parameter [WIDTH-1:0] CR_24_RST = 0,
    parameter [WIDTH-1:0] CR_25_RST = 0,
    parameter [WIDTH-1:0] CR_26_RST = 0,
    parameter [WIDTH-1:0] CR_27_RST = 0,
    parameter [WIDTH-1:0] CR_28_RST = 0,
    parameter [WIDTH-1:0] CR_29_RST = 0,
    parameter [WIDTH-1:0] CR_30_RST = 0,
    parameter [WIDTH-1:0] CR_31_RST = 0)
(
output wire [`DWC_E12MP_X4NS_CR_DATA_RANGE] cr_rd_data,
input  wire [31:0]                cr_sel,
input  wire [`DWC_E12MP_X4NS_CR_DATA_RANGE] cr_wr_data,
input  wire                       cr_wr_en,
input  wire                       cr_clk,
input  wire                       cr_rst
);

wire [`DWC_E12MP_X4NS_CR_DATA_RANGE] cr_31_rd_data , cr_30_rd_data , cr_29_rd_data , cr_28_rd_data ,
                           cr_27_rd_data , cr_26_rd_data , cr_25_rd_data , cr_24_rd_data , 
                           cr_23_rd_data , cr_22_rd_data , cr_21_rd_data , cr_20_rd_data , 
                           cr_19_rd_data , cr_18_rd_data , cr_17_rd_data , cr_16_rd_data , 
                           cr_15_rd_data , cr_14_rd_data , cr_13_rd_data , cr_12_rd_data , 
                           cr_11_rd_data , cr_10_rd_data , cr_9_rd_data  ,  cr_8_rd_data , 
                           cr_7_rd_data  , cr_6_rd_data  , cr_5_rd_data  ,  cr_4_rd_data , 
                           cr_3_rd_data  , cr_2_rd_data  , cr_1_rd_data  ,  cr_0_rd_data;

assign cr_rd_data = cr_31_rd_data | cr_30_rd_data | cr_29_rd_data | cr_28_rd_data |
                    cr_27_rd_data | cr_26_rd_data | cr_25_rd_data | cr_24_rd_data | 
                    cr_23_rd_data | cr_22_rd_data | cr_21_rd_data | cr_20_rd_data | 
                    cr_19_rd_data | cr_18_rd_data | cr_17_rd_data | cr_16_rd_data | 
                    cr_15_rd_data | cr_14_rd_data | cr_13_rd_data | cr_12_rd_data | 
                    cr_11_rd_data | cr_10_rd_data | cr_9_rd_data  |  cr_8_rd_data | 
                    cr_7_rd_data  | cr_6_rd_data  | cr_5_rd_data  |  cr_4_rd_data | 
                    cr_3_rd_data  | cr_2_rd_data  | cr_1_rd_data  |  cr_0_rd_data;

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_0_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_0_reg (
  .cr_val      (),
  .cr_rd_data  (cr_0_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[0]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_1_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_1_reg (
  .cr_val      (),
  .cr_rd_data  (cr_1_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[1]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_2_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_2_reg (
  .cr_val      (),
  .cr_rd_data  (cr_2_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[2]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_3_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_3_reg (
  .cr_val      (),
  .cr_rd_data  (cr_3_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[3]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_4_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_4_reg (
  .cr_val      (),
  .cr_rd_data  (cr_4_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[4]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_5_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_5_reg (
  .cr_val      (),
  .cr_rd_data  (cr_5_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[5]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_6_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_6_reg (
  .cr_val      (),
  .cr_rd_data  (cr_6_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[6]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_7_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_7_reg (
  .cr_val      (),
  .cr_rd_data  (cr_7_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[7]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_8_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_8_reg (
  .cr_val      (),
  .cr_rd_data  (cr_8_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[8]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_9_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_9_reg (
  .cr_val      (),
  .cr_rd_data  (cr_9_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[9]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_10_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_10_reg (
  .cr_val      (),
  .cr_rd_data  (cr_10_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[10]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_11_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_11_reg (
  .cr_val      (),
  .cr_rd_data  (cr_11_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[11]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_12_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_12_reg (
  .cr_val      (),
  .cr_rd_data  (cr_12_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[12]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_13_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_13_reg (
  .cr_val      (),
  .cr_rd_data  (cr_13_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[13]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_14_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_14_reg (
  .cr_val      (),
  .cr_rd_data  (cr_14_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[14]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_15_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_15_reg (
  .cr_val      (),
  .cr_rd_data  (cr_15_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[15]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_16_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_16_reg (
  .cr_val      (),
  .cr_rd_data  (cr_16_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[16]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_17_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_17_reg (
  .cr_val      (),
  .cr_rd_data  (cr_17_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[17]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_18_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_18_reg (
  .cr_val      (),
  .cr_rd_data  (cr_18_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[18]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_19_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_19_reg (
  .cr_val      (),
  .cr_rd_data  (cr_19_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[19]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_20_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_20_reg (
  .cr_val      (),
  .cr_rd_data  (cr_20_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[20]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_21_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_21_reg (
  .cr_val      (),
  .cr_rd_data  (cr_21_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[21]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_22_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_22_reg (
  .cr_val      (),
  .cr_rd_data  (cr_22_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[22]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_23_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_23_reg (
  .cr_val      (),
  .cr_rd_data  (cr_23_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[23]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_24_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_24_reg (
  .cr_val      (),
  .cr_rd_data  (cr_24_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[24]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_25_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_25_reg (
  .cr_val      (),
  .cr_rd_data  (cr_25_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[25]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_26_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_26_reg (
  .cr_val      (),
  .cr_rd_data  (cr_26_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[26]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_27_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_27_reg (
  .cr_val      (),
  .cr_rd_data  (cr_27_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[27]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_28_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_28_reg (
  .cr_val      (),
  .cr_rd_data  (cr_28_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[28]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_29_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_29_reg (
  .cr_val      (),
  .cr_rd_data  (cr_29_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[29]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_30_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_30_reg (
  .cr_val      (),
  .cr_rd_data  (cr_30_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[30]),
  .cr_self_clr (1'b0)
);

dwc_e12mp_phy_x4_ns_pcs_raw_cr_rw_reg #(.ROM(ROM), .WIDTH(WIDTH), .RST_VAL(CR_31_RST), .MSK_VAL({WIDTH{1'b0}})) 
 cr_31_reg (
  .cr_val      (),
  .cr_rd_data  (cr_31_rd_data),
  .cr_wr_data  (cr_wr_data),
  .cr_wr_en    (cr_wr_en),
  .cr_clk      (cr_clk),
  .cr_rst      (cr_rst),
  .cr_sel      (cr_sel[31]),
  .cr_self_clr (1'b0)
);

endmodule
